Team Alex Bradbury At Igalia since March 2022. Cambridge (UK) Follow me muxup.com bsky.app/profile/asbradbury.org github.com/asb linkedin.com/in/alex-bradbury fosstodon.org/@asb POSTS Jan 7, 2026 Per-query energy consumption of LLMs How much energy is consumed when querying an LLM? We’re largely in the dark when it comes to proprietary models, but for open weight models that anyone can host on... Continue reading > Dec 2, 2025 QEMU-based instruction execution counting Although analysing performance by way of instruction counting has obvious limitations, it can be helpful (especially when combined with appropriate analysis scripts) to get rapid feedback on the impact of... Continue reading > Dec 1, 2025 Minipost: Olmo 3 training cost Recently I jotted down some notes on LLM inference vs training costs for DeepSeek and I wanted to add on an additional datapoint for training cost based on the recently... Continue reading > Nov 30, 2025 Minipost: Benchmarking the Hetzner AX102 vs CCX53 I recently had reason to do a quick comparison of the performance of the Hetzner AX102 dedicated server and the high-end ‘dedicated’ CCX53 VPS on Hetzner Cloud and thought I... Continue reading > Media Improvements to RISC-V Vector Code Generation in LLVM Improvements to RISC-V Vector Code Generation in LLVM Jul 7, 2025 Slides (354 KB PDF) Lessons learned from leveling up RISC-V LLVM testing Lessons learned from leveling up RISC-V LLVM testing Jun 9, 2025 RISC-Y Business RISC-Y Business Jan 31, 2025 Toots Jan 22, 2026 2% of Golang 2025 survey respondents are deploying their Go software to RISC-V. Take that, s390x! https://go.dev/blog/survey2025#operating-systems-and-architectures Dec 20, 2025 Wake up babe, new proposed RISC-V base ISA names just dropped. https://lists.riscv.org/g/tech-unprivileged/topic/longer_base_name_proposal/116854896How long until we see an rv32lbefx_mafc_zicntr_zicsr_zifencei_zba_zbb_zbs_zca_zfa in the... Dec 3, 2025 I’ve started writing up the flow I use for capturing instruction execution frequency data from benchmarks using QEMU. First we... Oct 14, 2025 Unknown whether this is due to changes in default buffer size in sox, the Linux audio stack, or otherwise, but... Commits Jan 30, 2026 [LLVM] Revert "[DAG] Enable bitcast STLF for Constant/Undef" (#178872) Jan 16, 2026 [LLVM] [lld][COFF][NFC] Fix warnings on 32-bit asserts builds (#176178) Jan 15, 2026 [LLVM] [MC][NFC] Use appendLEB128 helper in MCDwarf.cpp (#175962) Jan 12, 2026 [LLVM] [RISCV] Fix ReplaceNodeResults of Intrinsic::experimental_cttz_elts f…
Jan 7, 2026 Per-query energy consumption of LLMs How much energy is consumed when querying an LLM? We’re largely in the dark when it comes to proprietary models, but for open weight models that anyone can host on... Continue reading >
Dec 2, 2025 QEMU-based instruction execution counting Although analysing performance by way of instruction counting has obvious limitations, it can be helpful (especially when combined with appropriate analysis scripts) to get rapid feedback on the impact of... Continue reading >
Dec 1, 2025 Minipost: Olmo 3 training cost Recently I jotted down some notes on LLM inference vs training costs for DeepSeek and I wanted to add on an additional datapoint for training cost based on the recently... Continue reading >
Nov 30, 2025 Minipost: Benchmarking the Hetzner AX102 vs CCX53 I recently had reason to do a quick comparison of the performance of the Hetzner AX102 dedicated server and the high-end ‘dedicated’ CCX53 VPS on Hetzner Cloud and thought I... Continue reading >
Improvements to RISC-V Vector Code Generation in LLVM Improvements to RISC-V Vector Code Generation in LLVM Jul 7, 2025 Slides (354 KB PDF)
Lessons learned from leveling up RISC-V LLVM testing Lessons learned from leveling up RISC-V LLVM testing Jun 9, 2025
Jan 22, 2026 2% of Golang 2025 survey respondents are deploying their Go software to RISC-V. Take that, s390x! https://go.dev/blog/survey2025#operating-systems-and-architectures
Dec 20, 2025 Wake up babe, new proposed RISC-V base ISA names just dropped. https://lists.riscv.org/g/tech-unprivileged/topic/longer_base_name_proposal/116854896How long until we see an rv32lbefx_mafc_zicntr_zicsr_zifencei_zba_zbb_zbs_zca_zfa in the...
Dec 3, 2025 I’ve started writing up the flow I use for capturing instruction execution frequency data from benchmarks using QEMU. First we...
Oct 14, 2025 Unknown whether this is due to changes in default buffer size in sox, the Linux audio stack, or otherwise, but...